Japanese Unexamined Patent Application Publication No. 60-192401 (“Patent Document 1”) discloses a line transition including a planar circuit formed using a dielectric substrate and a solid waveguide for propagating electromagnetic waves in a three-dimensional space to realize planar-circuit to waveguide transition.
The line transition disclosed in Patent Document 1 is constructed in such a manner that a microstrip line is formed in the dielectric substrate to realize the planar circuit and the dielectric substrate is partially inserted into an end short-circuit waveguide so as to partition the end short-circuit waveguide into two segments in a plane perpendicular to the H plane.
Japanese Patent Application No. 2003-193156, to the same assignee, discloses a line transition including a dielectric substrate arranged parallel to the E plane of a solid waveguide in almost the middle of the solid waveguide, a conductive pattern segment functioning as a cut-off region of the solid waveguide, and a coupled-line pattern segment electromagnetically coupled with standing waves generated in the cut-off region, the conductive pattern segment and the coupled-line pattern segment being included in a conductive pattern of the dielectric substrate.
In the above-mentioned line transition in which the microstrip line is inserted in the waveguide such that the microstrip line is perpendicular to the H plane of the waveguide, in order to match the impedance of the microstrip line to that of the waveguide, the reactance of the end of the inserted microstrip line on the side thereof has to be zero, the end being the coupled-line pattern segment which serves as a suspended line. To set the reactance of the coupled-line pattern segment to be zero, the matching is designed using the following two impedances:
(1) Impedance of a short-circuit portion in the waveguide (the short-circuit structure including a structure using the cut-off characteristics of the waveguide); and
(2) Impedance of a portion (edge of the dielectric substrate), where the microstrip line does not exist in the dielectric substrate, in the waveguide.
The above impedance (1) is defined by the positional relationship between the coupled-line pattern segment and the short-circuit portion. The impedance (2) is defined by the positional relationship between the coupled-line pattern segment and the edge of the substrate. As will be described below, the positional relationship between the coupled-line pattern segment and the edge of the substrate has a disadvantage in that high positioning accuracy is not obtained because of a method for manufacturing the dielectric substrate.
The dielectric substrate including the above-mentioned coupled-line pattern segment is formed in such a manner that a plurality of conductive patterns are formed on a ceramic green sheet serving as a motherboard, the motherboard is fired, and after that, the fired motherboard is cut at regular intervals into individual dielectric substrates.
In cutting the fired motherboard, according to automatic dicing, a reference point is set to an arbitrary portion, e.g., one end of the motherboard, the motherboard is cut at predetermined intervals relative to the reference point. Since the motherboard is shrunk by firing, the intervals are determined in consideration of the rate of shrinkage.
However, the motherboard has a large variation in the shrinkage rate in firing. The spacings between dicing lines deviate from the corresponding conductive patterns arranged on the motherboard to be cut. Accordingly, as the distance between the dicing line and the reference point of the motherboard is longer, the deviation from the corresponding conductive pattern on the motherboard is larger. For example, when the motherboard is cut using one end thereof as the reference point, the variation in shrinkage of the motherboard significantly affects the dicing line in the vicinity of the other end. In addition, as the difference between the shrinkage rate of the motherboard in firing and a set value becomes larger, the deviation becomes more pronounced.
When the space between the edge of each dielectric substrate and the coupled-line pattern segment is different from a design value, the reactance of the coupled-line pattern segment on the side of a transmission-line pattern segment is increased, thus resulting in impedance mismatching between the solid waveguide and the planar circuit. Unfortunately, predetermined line-transition characteristics cannot be obtained.